I draw original integrated circuit mask layouts (2 dimensional drawing) using specialized engineering software (i.e. Cadence, Inc) through a process of manually translating engineering logic and schematic drawings. The original mask layouts are dictated by Mask Vendor Design Rules which specify the specific drawing requirements of typically 16 seperate physical mask layout layers which interact when drawn together to create the transistors, resistors, capacitors and other special logic and schematic elements found in the engineering drawings. The mask layout drawings are processed by verification software which confirms the drawing conforms to the Mask Vendor Design Rules and matches the intent of the Engineering schematic drawings. The finished mask layouts are used to make most all electronic applications operate. I've specifically been part of the design teams for Cell Phones, Disk Drive controllers, Computer memory, Digital to Analog Convertors, Wrist Watch circuits, Computer Microprocessors, and new design concepts refered to as "intellectual property" designs.